1. Field of the Invention
The present invention relates to a skew detection device, and more particularly to, a skew detection device which can detect a skew of a transistor changed due to a driving voltage, a size and a process variable.
2. Description of the Prior Art
FIG. 1 is a graph showing saturation current characteristics of a general NMOS transistor (W/L=40/1) by skew and temperature variations.
Referring to FIG. 1, an ordinate axis shows a drain-source current Ids of the NMOS transistor, and a transverse axis shows temperature variations (−10° C., 25° C., 90° C.). TYP, SLOW and FAST on the transverse axis denote current characteristics of the NMOS transistor. That is, TYP means a typical group existing within the current characteristics range required by a manufacturer, SLOW means a group having lower current characteristics than the TYP group transistor (namely, group having small current quantity), and FAST means a group having higher current characteristics than the TYP group transistor (namely, group having large current quantity). Differences of the transistors in current characteristics result from process variables. For example, the current characteristics of the transistor are changed due to variations of a thickness of a gate insulating film, a width/length W/L, a sheet resistance and a threshold voltage Vth. For information, ‘skew’ is defined as characteristics variations of a transistor by process variables or the likes.
Still referring to FIG. 1, a variation width of the drain current Ids is larger when the drain-source voltage Vds is high than when it is low. When the drain-source voltage Vds is 1V, the variation width of the drain current Ids is about 3.03 mA, but when the drain-source voltage Vds is 0.2V, the variation width of the drain current Ids is about 0.8 mA.
The variation width of the current is considerably changed due to the drain-source voltage Vds in FIG. 1, which results from current curve characteristics of the transistor. The current curve characteristics of the transistor will now be explained with reference to FIG. 2.
FIG. 2 is a graph showing a current-voltage characteristic curve of the NMOS transistor.
In FIG. 2, an ordinate axis shows a drain-source current Ids, and a transverse axis shows a drain-source voltage Vds.
As illustrated in FIG. 2, when the drain-source voltage Vds is 0.2V, the transistor is positioned in a linear region, and when the drain-source voltage Vds is 1V, the transistor is positioned in a saturation region.
Here, the variation width of the current is larger in the saturation region than in the linear region, which corresponds to the information of FIG. 1.
As described above, the current characteristics of the transistor are remarkably changed due to the process variables (thickness of gate insulating film, width/length W/L, sheet resistance and threshold voltage Vth), and a size of the driving voltage.
When the characteristics of the transistor are seriously changed, a circuit design is more complicated.